A semiconductor chip assembly may include a chip carrier which includes a dielectric layer overlying the front surface of the chip, with an array of terminals or "bumps" on the dielectric layer, and leads electrically connected to the terminals, and a semiconductor chip or "die". The bumps in the chip carrier are connected via the leads to contacts on the die. Such a chip assembly typically is used by placing it on a circuit board or other circuit panel and electrically connecting the terminals on the chip carrier to the panel as by soldering.
It is often desirable to more effectively "package" a semiconductor chip assembly so that it can be handled with less fear of damage to the assembly so that a heat sink can be married with the semiconductor chip or both. However, if a semiconductor chip assembly is to be so packaged for these or other purposes, the utmost care must be taken during the packaging process to avoid affecting the integrity of the terminals on the chip carrier. In particular, it is important to avoid contaminating the terminals on the chip carrier with the encapsulant.
Accordingly, a method of controlling the encapsulation of a semiconductor chip assembly, with or without an elastomeric pad or layer, such that the integrity of the terminals and leads are not affected is desirable.